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public:tech:tm4c123g:io_ports
Port Base address
PortA 0x40004000
PortB 0x40005000
PortC 0x40006000
PortD 0x40007000
PortE 0x40024000
PortF 0x40025000
If we wish to access bit Constant
7 0x0200
6 0x0100
5 0x0080
4 0x0040
3 0x0020
2 0x0010
1 0x0008
0 0x0004
void PortF_Init(void){
  volatile unsigned long delay;
  SYSCTL_RCGC2_R |= 0x00000020;     // 1) activate clock for Port F
  delay = SYSCTL_RCGC2_R;           // allow time for clock to start
  GPIO_PORTF_LOCK_R = 0x4C4F434B;   // 2) unlock GPIO Port F
  GPIO_PORTF_CR_R = 0x1F;           // allow changes to PF4-0
  // only PF0 needs to be unlocked, other bits can't be locked
  GPIO_PORTF_AMSEL_R = 0x00;        // 3) disable analog on PF
  GPIO_PORTF_PCTL_R = 0x00000000;   // 4) PCTL GPIO on PF4-0
  GPIO_PORTF_DIR_R = 0x0E;          // 5) PF4,PF0 in, PF3-1 out
  GPIO_PORTF_AFSEL_R = 0x00;        // 6) disable alt funct on PF7-0
  GPIO_PORTF_PUR_R = 0x11;          // enable pull-up on PF0 and PF4
  GPIO_PORTF_DEN_R = 0x1F;          // 7) enable digital I/O on PF4-0
}
SYSCTL_RCGC2_R |= 0x00000001;     // 1) activate clock for Port A
delay = SYSCTL_RCGC2_R;           // allow time for clock to start
GPIO_PORTA_AMSEL_R &= ~0x80;      // 3) disable analog on PA7
GPIO_PORTA_PCTL_R &= ~0xF0000000; // 4) PCTL GPIO on PA7
GPIO_PORTA_DIR_R |= 0x80;         // 5) PA7 out
GPIO_PORTA_AFSEL_R &= ~0x80;      // 6) disable alt funct on PA7
GPIO_PORTA_DEN_R |= 0x80;         // 7) enable digital I/O on PA7
public/tech/tm4c123g/io_ports.txt · Last modified: 2025/01/22 16:49 by 127.0.0.1

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